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features ? floating channel designed for bootstrap operation fully operational to +600v tolerant to negative transient voltage dv/dt immune ? gate drive supply range from 10 to 20v ? undervoltage lockout ? cmos schmitt-triggered inputs with pull-down ? output in phase with input (IR2117) or out of phase with input (ir2118) ? also available lead-free data sheet no. pd60146 rev o single channel driver product summary v offset 600v max. i o +/- 200 ma / 420 ma v out 10 - 20v t on/off (typ.) 125 & 105 ns packages typical connection 8-lead pdip IR2117/ir2118 8-lead soic IR2117s/ir2118s IR2117 ir2118 IR2117(s)/ir2118(s) & (pbf) www.irf.com 1 (refer to lead assignments for correct pin configuration). this/these diagram(s) show electrical connections only. please refer to our application notes and designtips for proper circuit board layout. description the IR2117/ir2118(s) is a high voltage, high speed power mosfet and igbt driver. proprietary hvic and latch immune cmos technologies enable ruggedized monolithic construction. the logic input is compatible with standard cmos outputs. the output driver fea- tures a high pulse current buffer stage designed for minimum cross-conduction. the floating channel can be used to drive an n-channel power mosfet or igbt in the high or low side configuration which operates up to 600 volts.
IR2117(s)/ir2118(s) & (pbf) 2 www.irf.com symbol definition min. max. units v b high side floating supply voltage -0.3 625 v s high side floating supply offset voltage v b - 25 v b + 0.3 v ho high side floating output voltage v s - 0.3 v b + 0.3 v cc logic supply voltage -0.3 25 v in logic input voltage -0.3 v cc + 0.3 dv s /dt allowable offset supply voltage transient (figure 2) ? 50 v/ns p d package power dissipation @ t a +25 c (8 lead pdip) ? 1.0 (8 lead soic) ? 0.625 rth ja thermal resistance, junction to ambient (8 l ead pdip) ? 125 (8 lead soic) ? 200 t j junction temperature ? 150 t s storage temperature -55 150 t l lead temperature (soldering, 10 seconds) ? 300 absolute maximum ratings absolute maximum ratings indicate sustained limits beyond which damage to the device may occur. all voltage param- eters are absolute voltages referenced to com. the thermal resistance and power dissipation ratings are measured under board mounted and still air conditions. additional information is shown in figures 5 through 8. symbol definition min. max. units v b high side floating supply absolute voltage v s + 10 v s + 20 v s high side floating supply offset voltage note 1 600 v ho high side floating output voltage v s v b v cc logic supply voltage 10 20 v in logic input voltage 0 v cc t a ambient temperature -40 125 c note 1: logic operational for v s of -5 to +600v. logic state held for v s of -5v to -v bs . (please refer to the design tip dt97-3 for more details). recommended operating conditions the input/output logic timing diagram is shown in figure 1. for proper operation the device should be used within the recommended conditions. the v s offset rating is tested with all supplies biased at 15v differential. w c/w v c v
IR2117(s)/ir2118(s) & (pbf) www.irf.com 3 symbol definition min. t yp. max. units test conditions t on turn-on propagation delay ? 125 200 v s = 0v t off turn-off propagation delay ? 105 180 v s = 600v t r turn-on rise time ? 80 130 t f turn-off fall time ? 40 65 dynamic electrical characteristics v bias (v cc , v bs ) = 15v, c l = 1000 pf and t a = 25 c unless otherwise specified. the dynamic electrical characteristics are measured using the test circuit shown in figure 3. ns symbol definition min. t yp. max. units test conditions v ih input voltage - logic ?1? (IR2117) logic ?0? (ir2118) 9.5 ? ? v il input voltage - logic ?0? (IR2117) logic ?1? (ir2118) ? ? 6.0 v oh high level output voltage, v bias - v o ? ? 100 i o = 0a v ol low level output voltage, v o ? ? 100 i o = 0a i lk offset supply leakage current ? ? 50 v b = v s = 600v i qbs quiescent v bs supply current ? 50 240 v in = 0v or v cc i qcc quiescent v cc supply current ? 70 340 v in = 0v or v cc i in+ logic ?1? input bias current (IR2117) v in = v cc (ir2118) v in = 0v i in- logic ?0? input bias current (IR2117) v in = 0v (ir2118) v in = v cc v bsuv+ v bs supply undervoltage positive going threshold 7.6 8.6 9.6 v bsuv- v bs supply undervoltage negative going threshold 7.2 8.2 9.2 v ccuv+ v cc supply undervoltage positive going threshold 7.6 8.6 9.6 v ccuv- v cc supply undervoltage negative going threshold 7.2 8.2 9.2 i o+ output high short circuit pulsed current 200 250 ? v o = 0v v in = logic ?1? pw 10 s i o- output low short circuit pulsed current 420 500 ? v o = 15v v in = logic ?0? pw 10 s static electrical characteristics v bias (v cc , v bs ) = 15v and t a = 25 c unless otherwise specified. the v in , v th and i in parameters are referenced to com. the v o and i o parameters are referenced to com and are applicable to the respective output leads: ho or lo. ma v v mv ? 20 40 a ? ? 1.0
IR2117(s)/ir2118(s) & (pbf) 4 www.irf.com functional block diagram (IR2117) functional block diagram (ir2118)
IR2117(s)/ir2118(s) & (pbf) www.irf.com 5 lead definitions symbol description v cc logic and gate drive supply in logic input for gate driver output (ho), in phase with ho (IR2117) in logic input for gate driver output (ho), out of phase with ho (ir2118) com logic ground v b high side floating supply ho high side gate drive output v s high side floating supply return lead assignments 8 lead pdip 8 lead soic ir2118 ir2118s 1 2 3 4 8 7 6 5 v cc in com v b ho v s 1 2 3 4 8 7 6 5 v cc in com v b ho v s 8 lead pdip 8 lead soic IR2117 IR2117s 1 2 3 4 8 7 6 5 v cc in com v b ho v s 1 2 3 4 8 7 6 5 v cc in com v b ho v s
IR2117(s)/ir2118(s) & (pbf) 6 www.irf.com figure 1. input/output timing diagram figure 3. switching time test circuit f igure 4. switching time waveform definition IR2117/ir2118 figure 2. floating supply voltage transient test circuit ho 90% 90% 10% 10% 50% 50% t r t f t on t off in 50% 50% in (ir2118) (IR2117) in (IR2117) ho in (ir2118) IR2117/ir2118 <50 v/ns
IR2117(s)/ir2118(s) & (pbf) www.irf.com 7 0 100 200 300 400 500 10 12 14 16 18 20 v bias supply voltage (v) turn-on delay time (ns ) figure 4b. turn-on time vs. supply voltage typ. m ax. 0 100 200 300 400 500 -50-25 0 25 50 75100125 temperature ( o c) turn-on delay time (ns ) figure 4a. turn-on time vs. tem p erature typ. m ax. 0 100 200 300 400 500 -50-25 0 255075100125 temperature ( o c) turn-off time (ns) figure 5a. turn-off time vs. temperature typ. m ax. 0 100 200 300 400 500 10 12 14 16 18 20 v bias supply voltage (v) turn-off time (ns) figure 5b. turn-off time vs. supply voltage typ. m ax.
IR2117(s)/ir2118(s) & (pbf) 8 www.irf.com 0 100 200 300 400 500 -50-250 255075100125 temperature ( o c) turn-on rise time (ns ) fiure 6a. turn-on rise time vs.tem p erature typ. m ax. 0 100 200 300 400 500 10 12 14 16 18 20 v bias supply voltage (v) turn-on rise time (ns ) figure 6b. turn-on rise time vs. su pp l y volta g e typ. m ax. 0 50 100 150 200 250 10 12 14 16 18 20 v bias supply voltage (v) turn-off fall time (ns ) figure 7b. turn-off fall time vs. supply voltage typ. m ax. 0 50 100 150 200 250 -50 -25 0 25 50 75 100 125 temperature ( o c) turn-off fall time (ns ) typ. m ax. figure 7a. turn-off fall time vs. tem p erature
IR2117(s)/ir2118(s) & (pbf) www.irf.com 9 8 9 10 11 12 13 -50 -25 0 25 50 75 100 125 temperature ( o c) input voltage (v) figure 8a. logic "1" (ir2118 "0") input voltage vs. temperature min. 4 5 6 7 8 9 -50-250 255075100125 temper atr e ( o c) input voltage (v) figure 9a. logic "0" (ir2118 "1") input voltage vs. temperature m ax. mi n. 3 6 9 12 15 18 10 12 14 16 18 20 v cc supply voltage (v) input voltage (v) figure 8b. logic "1" (ir2118 "0") input voltage vs. supply voltage figure 8b. logic "1" (ir2118 "0") input voltage vs. supply voltage m ax. 0 3 6 9 12 15 10 12 14 16 18 20 v cc supply voltage (v) input voltage (v) figure 9b. logic "0" (ir2118 "1") input voltage vs. supply voltage figure 9b. logic "0" (ir2118 "1") input voltage vs. supply voltage
IR2117(s)/ir2118(s) & (pbf) 10 www.irf.com 0.0 0.1 0.2 0.3 0.4 0.5 -50 -25 0 25 50 75 100 125 temperature ( o c) high level output voltage (v ) figure 10a. high level output vs. temperature m ax. 0 0.1 0.2 0.3 0.4 0.5 10 12 14 16 18 20 v cc supply voltage (v) high level output voltage (v) figure 10b. high level output vs. supply voltage m ax. 0 0.1 0.2 0.3 0.4 0.5 -50-250 255075100125 temperature ( o c) low level output voltage (v) figure 11a. low level output vs.temperature m ax. 0 0.1 0.2 0.3 0.4 0.5 10 12 14 16 18 20 v cc supply voltage (v) low level output voltage (v) figure 11b. low level output vs. supply voltage max.
IR2117(s)/ir2118(s) & (pbf) www.irf.com 11 0 100 200 300 400 500 -50 -25 0 25 50 75 100 125 temperature ( o c) offset supply leakage current ( a) m ax. figure 12a. offset supply leakage current vs. tem perature 0 100 200 300 400 500 0 100 200 300 400 500 600 v b boost voltage (v) offset supply leakage current ( a) m ax. figure 12b. offset supply leakage current vs. v b boost voltage 0 200 400 600 800 1000 -50 -25 0 25 50 75 100 125 temperature ( o c) v supply current ( ) figure 13a. v bs supply current vs . te m perature typ. m ax. 0 200 400 600 800 1000 10 12 14 16 18 20 v bs supply voltage (v) v supply current ( ) figure 13b. v bs supply current vs. supply voltage typ. m ax.
IR2117(s)/ir2118(s) & (pbf) 12 www.irf.com 0 200 400 600 800 1000 -50-25 0 25 50 75100125 temperature ( o c) v cc supply current ( a) figure 14a. v cc supply current vs. temperature m ax. typ. 0 200 400 600 800 1000 10 12 14 16 18 20 v cc supply voltage (v) v cc supply current ( ) figure 14b. v cc supply current vs. supply voltage m ax. typ. 0 20 40 60 80 100 120 -50 -25 0 25 50 75 100 125 logic "1" input current ( ) figure 15a. logic "1" (2118 "0") input current vs. temperature temperature ( o c) m ax. typ. 0 20 40 60 80 100 120 10 12 14 16 18 20 v cc supply voltage (v) logic "1" input current ( ) figure 15b. logic "1" (2118 "0") input current vs. supply voltage m ax. typ.
IR2117(s)/ir2118(s) & (pbf) www.irf.com 13 0 1 2 3 4 5 -50 -25 0 25 50 75 100 125 temperature ( o c) logic "0" input current ( ) figure 16a. logic "0" (2118"1") input current vs . te m perature m ax. 0 1 2 3 4 5 10 12 14 16 18 20 v cc supply voltage (v) logic "0" input current ( ) figure 16b. logic "0" (2118"1") input current vs. supply voltage m ax. figure 17a. v cc undervoltage threshold (+) vs. tem pe rature 6 8 10 12 14 16 -50 -25 0 25 50 75 100 125 temperature ( o c) v cc supply current ( ) m ax. typ. mi n. 6 8 10 12 14 16 -50 -25 0 25 50 75 100 125 temperature ( o c) v cc supply current ( ) typ. figure 18a. v cc undervoltage threshold (-) vs . te m perature max mi n.
IR2117(s)/ir2118(s) & (pbf) 14 www.irf.com 0 100 200 300 400 500 -50 -25 0 25 50 75 100 125 temperature ( o c) output source current (ma) figure 21a. output source current vs . te m perature typ. mi n. 6 8 10 12 14 16 -50 -25 0 25 50 75 100 125 temperature ( o c) v bs supply current ( ) figure 19a. v bs undervoltage threshold (+) vs. temperature max. typ. mi n. 6 8 10 12 14 16 -50 -25 0 25 50 75 100 125 temperature ( o c) v supply current ( ) figure 20a. v bs undervoltage threshold (-) vs . te m perature m ax. typ . mi n. 0 100 200 300 400 500 10 12 14 16 18 20 v bias supply voltage (v) output source current (ma) mi n. figure 21b. output source current vs. supply voltage typ.
IR2117(s)/ir2118(s) & (pbf) www.irf.com 15 0 200 400 600 800 1000 -50-25 0 25 50 75100125 temperature ( o c) output sink current ( ) figure 22a. output sink current vs.temperature typ. mi n. -12 -10 -8 -6 -4 -2 0 10 12 14 16 18 20 v bs floting supply voltage (v) vs offset supply voltage (v) figure 23b. maximum vs negative offset vs. supply voltage typ. 0 200 400 600 800 1000 10 12 14 16 18 20 v bias supply voltage (v) output sink current ( ) figure 22b. output sink current vs. supply voltage mi n. typ.
IR2117(s)/ir2118(s) & (pbf) 16 www.irf.com figure 26. IR2117/ir2118 t j vs. frequency (irfbc40) r gate = 15 , v cc = 15v figure 27. IR2117/ir2118 t j vs. frequency (irfpe50) r gate = 10 , v cc = 15v figure 24. IR2117/ir2118 t j vs. frequency (irfbc20) r gate = 33 , v cc = 15v figure 25. IR2117/ir2118 t j vs. frequency (irfbc30) r gate = 22 , v cc = 15v 0 25 50 75 100 125 150 1e+2 1e+3 1e+4 1e+5 1e+6 frequency (hz) junction temperature (c) 320v 140v 10v 0 25 50 75 100 125 150 1e+2 1e+3 1e+4 1e+5 1e+6 frequency (hz) junction temperature (c) 320v 140v 10v 0 25 50 75 100 125 150 1e+2 1e+3 1e+4 1e+5 1e+6 frequency (hz) junction temperature (c) 320v 140v 10v 0 25 50 75 100 125 150 1e+2 1e+3 1e+4 1e+5 1e+6 frequency (hz) junction temperature (c) 320v 140v 10v
IR2117(s)/ir2118(s) & (pbf) www.irf.com 17 01-6014 01-3003 01 (ms-001ab) 8-lead pdip case outlines 01-6027 8-lead soic 87 5 65 d b e a e 6x h 0.25 [.010] a 6 4 3 12 4. outline conforms to jedec outline ms-012aa. notes: 1. dimensioning & toleranc ing per asme y14.5m-1994. 2. controlling dimension: millimeter 3. dimensions are shown in millimeters [inches]. 7 k x 45 8x l 8x c y footprint 8x 0.72 [.028] 6.46 [.255] 3x 1.27 [.050] 8x 1.78 [.070] 5 dimension does not include mold protrusions. 6 dimension does not include mold protrusions. mo ld protrusions not to exc e ed 0.25 [.010]. 7 dimension is the length of lead for soldering to a s ubstrate . mo ld protrusions not to exc e ed 0.15 [.006]. 0.25 [.010] c a b e1 a a1 8x b c 0.10 [.004] e1 d e y b a a1 h k l .189 .1497 0 .013 .050 basic .0532 .0040 .2284 .0099 .016 .1968 .1574 8 .020 .0688 .0098 .2440 .0196 .050 4.80 3.80 0.33 1.35 0.10 5.80 0.25 0.40 0 1.27 basic 5.00 4.00 0.51 1.75 0.25 6.20 0.50 1.27 min max millimeters in c h e s min max dim 8 e c .0075 .0098 0.19 0.25 .025 b asic 0.635 b as ic
IR2117(s)/ir2118(s) & (pbf) 18 www.irf.com leadfree part marking information order information basic part (non-lead free) 8-lead pdip IR2117 order IR2117 8-lead pdip ir2118 order ir2118 8-lead soic IR2117s order IR2117s 8-lead soic ir2118s order ir2118s leadfree part 8-lead pdip IR2117 order IR2117pbf 8-lead pdip ir2118 order ir2118pbf 8-lead soic IR2117s order IR2117spbf 8-lead soic ir2118s order ir2118spbf lead free released non-lead free released part number date code irxxxxxx yww? ?xxxx pin 1 identifier ir logo lot code (prod mode - 4 digit spn code) assembly site code per scop 200-002 p ? marking code ir world headquarters: 233 kansas st., el segundo, california 90245 tel: (310) 252-7105 this product has been qualified per industrial level data and specifications subject to change without notice. /4/2007

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